Vinayaka Jyothi ,
Ph.D.

Research Assistant

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NYU Tandon School of Engineering2017

Doctor of Philosophy, Electrical Engineering

Visvesvaraya Technological University2009

Bachelor of Engineering, Electronics and Communication

Polytechnic Institute of New York University2011

Master of Science, Electrical Engineering


Journal Articles


V. Jyothi, M Thoonoli, R Stern, R Karri, FPGA Trust Zone: Incorporating Trust and Reliability into FPGA Designs, IEEE International Conference on Computer Design, October 2016 (ICCD'16).


V. Jyothi, X. Wang, S.Addepalli, R. Karri, BRAIN: BehavioR based Adaptive Intrusion detection in Networks: Using Hardware Performance Counters to detect DDoS Attacks, VLSI Design Conference, January 2016 (VLSID'16).


V. Jyothi, S.Addepalli, R. Karri, Deep Packet Field Extraction Engine (DPFEE): A pre-processor for Network Intrusion Detection and Denial-of-Service Detection Systems, IEEE International Conference on Computer Design, October 2015 (ICCD'15) - Nominated for best paper award.


Y.Pino, V.Jyothi, M. French, Intra-Die Process Variation Aware Anomaly Detection in FPGAs, IEEE International Test Conference, to be published October 2014 (ITC'14).


Y.Pino, V.Jyothi, M. French, Within-Die Process Variation Aware Anomaly Detection in FPGAs, Government Microcircuit Applications and Critical Technology Conference, April 2014 (GOMACTECH'14).


J. Rajendran, V. Jyothi, and R. Karri, Red team blue team approach to hardware trust assessment: The embedded systems challenge experience, in the Proceedings of IEEE International Symposium on Computer Design, Oct 2011, pp. 285-288 (ICCD'11).


J. Rajendran, V. Jyothi, O. Sinanoglu, and R. Karri, Design and Analysis of Ring Oscillator-based Design-for-Trust technique, in the Proceedings of IEEE VLSI Test Symposium, May 2011, pp. 105-110 (VTS'11).



Ring oscillator based design-for-trust (US Patent #20120278893), (Design)

A ring oscillator (RO) based Design-For-Trust (DFTr) technique is described. Functional paths of integrated circuit (IC) are included in one or more embedded ROs by (1) selecting a path in the IC, based on path selection criteria, that has one or more unsecured gates, and (2) embedding one or more ROs on the IC until a stop condition is met. An input pattern to activate embedded RO is determined. Further, a golden frequency which is a frequency at which the embedded RO oscillates, and a frequency range of the embedded RO are determined. A Trojan in the IC may be detected by activating the embedded RO (by applying the input pattern), measuring a frequency at which the embedded RO oscillates, and determining whether or not a Trojan is present based on whether or not the measured frequency of the RO is within a predetermined operating frequency range of the RO.