Popularity Contest: Student Poster Takes Top Honor

Doctoral student Jeyavijayan (JV) Rajendran explains that while reverse engineering—dismantling a piece of technology in order to better understand it—has undeniable benefits, the practice can easily be misused. “An attacker can reverse engineer a chip in order to steal or pirate the design,” he says, pointing out that according to one study conducted by SEMI, a trade association of the micro- and nano-electronics industries, up to $4 billion is lost each year because of intellectual property violations.

While many researchers focus on chip efficiency or reliability, JV, who is advised by Professor Ramesh Karri, has focused his studies on security, with the aim of preventing such losses. (He also works closely with Professor Ozgur Sinanoglu, who directs the Design for Excellence Lab at NYU Abu Dhabi and credits both professors with his success.)

“It used to be assumed that everyone in the supply chain could be trusted,” he says. “But now we know that’s not always the case.” He explains that security breaches can be perpetrated by foundry workers during the manufacturing process, by a chip’s end user, or even by both.

JV’s doctoral work—generously supported in part by the Semiconductor Research Corporation, as he emphasizes—has resulted in a three-pronged approach to ensuring chip security. One technique, which he terms logic encryption, adds logic gates to the design to “lock” the chip, while camouflaging takes that one step further by calling for a series of logic gates that look identical—despite performing totally different functions--thereby confusing the would-be pirate.

A third security method, split manufacturing, assigns portions of the manufacturing process to multiple foundries, ensuring that no single foundry is privy to the entire design.

The project was also funded by Air Force Research Labs, NSF, CRISSP, and CRISSP-AD.

JV presented his work during a PhD competition hosted by the ACM’s Special Interest Group on Design Automation (SIGDA) at the 2014 Design Automation Conference, which was held in early June in San Francisco. Some 4,000 participants from industry and academia attended the event, and when they voted on their favorite presentation, he was the hands-down “People’s Choice” award winner.

Patents have been filed, and JV has already received interest from those wishing to license the technology. “I got a great deal of constructive feedback during the conference,” he says, “and it was wonderful to be named the favorite of the attendees.”