Part of the Special Joint ECE and NYU WIRELESS Seminar Series
Circuits: Terahertz (THz) and Beyond
Out of Many, Many: The Path towards Scalable, Integrated, mm-Wave MIMO Arrays
- Associate Professor, School of Electrical Engineering and Computer Science, Oregon State University
Research Website: Oregon State High-Speed Integrated Circuits Lab
Wireless data usage is doubling every year and network providers are projecting demand approaching 1Gb/user/day, necessitating a 1000x increase in network capacity and 100x increase in worst-case data rates with perhaps only 2x increase in available spectrum at frequencies below 3GHz. Future cellular wireless networks will evolve to higher center frequencies that provide larger available spectrum and to ultra-dense multi-user MIMO (MU-MIMO) with heterogenous cell size (macro, pico, femto) for increased spatial spectrum reuse. Therefore, scalable RF and mm-wave transceivers with 10 (user terminal) to 1000 (base station) elements operating in ad-hoc frequency-reuse scenarios are the future paradigm for wireless transceivers. Over the last 15 years, the feasibility of integrating multiple transceivers in silicon to achieve multiple-input single-output phased-array operation has been extensively demonstrated. However, MIMO transceivers that preserve all spatial degrees of freedom promise much higher data rates and support for digital multi-beam forming. Building such scalable digital-intensive MIMO radios will require energy-efficient scalable RF/mm-wave interfaces, interferer tolerance and scalable array synchronization. In this talk, I will explore these challenges and present our research on scalable efficient mm-wave antenna-IC interfaces, reconfigurable MIMO spectral/spatial/code-domain filtering and array-level clock synchronization, focusing on architectures/circuits that potentially improve upon simple scaling of single-element transceivers for MIMO arrays.
Dr Natarajan's research focuses on integrated circuits and systems for high-datarate wireless communication and imaging. Prior to joining Oregon State in 2012, Dr. Natarajan was a Research Staff Member in IBM T.J. Watson Research Center from 2007 to 2012. Dr. Natarajan received the National Talent Search Scholarship from the Government of India [1995-2000], the Caltech Atwood Fellowship in 2001, the Analog Devices Outstanding Student IC Designer Award in 2004, the IBM Research Fellowship in 2005, the 2011 Pat Goldberg Memorial Award for Best Paper in CS/EE/Math in IBM Research and the NSF CAREER Award in 2016. He is currently an Associate Editor for the IEEE Trans. on VLSI Systems, serves on the Technical Program Committee of the IEEE Intl. Solid-State Circuits Conference (ISSCC) and IEEE Radio-Frequency Integrated Circuits Conference (RFIC) and has served on TPC of the IEEE Compound Semiconductor IC Symposium (CSICS) and IEEE Intl. Microwave Symposium (IMS).
- Ph.D. in Electrical Engineering, California Institute of Technology
Thesis: Millimeter-Wave Phased Arrays in Silicon
- M.S. in Electrical Engineering, California Institute of Technology
- B.Tech in Electrical Engineering, Indian Institute of Technology, Chennai