H. Jonathan   Chao

H. Jonathan Chao

Professor

Electrical & Computer Engineering

Biography

H. Jonathan Chao, a recognized expert in networking, datacenters, and switches/routers, is professor in the Department of Electrical and Computer Engineering (ECE). He joined the NYU-Poly faculty in January 1992. He was Head of ECE Department from 2004 to 2014. 

He is currently Director of High-Speed Networking Lab, leading a team of a Research Associate Professor, 6 PhD students, and 10 Master Students. He has been doing research in the areas of software defined networking, network function virtualization, datacenter networks, high-speed packet processing, switching, routing, network security, quality of service control, and network on chip. He holds 58 patents and has published over 200 journal and conference papers. 

Chao is the co-founder and former CTO of Coree Networks, where he led a team in implementing a multi-terabit Multi-Protocol Label Switching (MPLS) switch router with carrier-class reliability. He helped raise $30 million for the first round of implementation. From 1985 to 1992, he was a member of technical staff at Telcordia, where he was involved in transport and switching system architecture designs and Application-specific Integrated Circuits (ASIC) implementations. He was a senior engineer at Telecommunication Labs of Taiwan performing circuit designs for a digital telephone switching system from 1977 to 1981.

He is a Fellow of National Academy of Inventors (NAI) for “having demonstrated a highly prolific spirit of innovation in creating or facilitating outstanding inventions that have made a tangible impact on quality of life, economic development, and the welfare of society.” He is a Fellow of the Institute of Electrical and Electronics Engineers (IEEE) for his contributions to the architecture and application of VLSI circuits in high-speed packet networks and was elected Speaker of the Year by IEEE New Jersey Coast Section in 2003. Chao was the 1987 recipient of the Telcordia Excellence Award and a co-recipient of the 2001 Best Paper Award from the IEEE Transaction on Circuits and Systems for Video Technology.  He coauthored three networking books, Broadband Packet Switching Technologies—A Practical Guide to ATM Switches and IP Routers (New York: Wiley, 2001), Quality of Service Control in High-speed Networks (New York: Wiley, 2001), and High-performance Switches and Routers (New York: Wiley, 2007).

He has served as a guest editor for the IEEE’s Journal on Selected Areas in Communications (JSAC) on the special topics of  “Advances in ATM Switching Systems for B-ISDN” (June 1997), “Next Generation IP Switches and Routers” (June 1999), two issues on “High-performance Optical/Electronic Switches/Routers for High-speed Internet” (May and September 2003), and “High-speed Network Security” (October 2006). He also served as an editor for IEEE/ACM Transactions on Networking from 1997–2000.

Chao earned his bachelor’s and master’s in electrical engineering from National Chiao Tung University, Taiwan, and his PhD in Electrical Engineering from Ohio State University.
 

Journal Articles

1. R. Wei, Y. Xu, and H. J. Chao, “Finding Nonequivalent Classifiers in Boolean Space to Reduce TCAM Usage,” IEEE/ACM Transactions on Networking (TON), Volume: 24, Issue: 2, pp. 968-981, Apr. 2016.
2. Y. Xia, M. Hamdi, and H. J. Chao, “A Practical Large-capacity Three-stage Buffered Clos-network Switch Architecture,” IEEE Transactions on Parallel and Distributed Systems, Volume: 27, Issue: 2, pp. 317-328, Feb. 2016.
3. Junjie Zhang, Kang Xi and H. Jonathan Chao, "Load Balancing using Generalized Destination-based Multipath Routing,” IEEE/ACM Transactions on Networking (TON), Volume: 23, Issue: 6, pp. 1959-1969, Dec. 2015.
4. Zehua Guo, Yang Xu, Marco Cello, Junjie Zhang, Zicheng Wang, Mingjian Liu, and H. Jonathan Chao, “JumpFlow: Reducing Flow Table Usage in Software-Defined Networks,” Elsevier Computer Networks, Vol. 92, Part 2, December 2015, pp. 300–315.
5. Z. Guo, Z. Duan, Y. Xu, and H. J. Chao, “JET: Electricity Cost-aware Dynamic Workload Management in Geographically Distributed Datacenters,” Elsevier Computer Communications, Special issue on Green Networking, Volume 50, pp. 162–174, September 2014.
6. Zehua Guo, Mu Su, Yang Xu, Zhemin Duan, Luo Wang, Shufeng Hui, and H. Jonathan Chao. “Improving the Performance of Load Balancing in Software-Defined Networks through Load Variance based Synchronization,” Elsevier Computer Networks, Volume 68, August 2014, pp. 95–109 .
7. I. Widjaja, A. Walid, Y. Luo. Y. Xu, and H. J. Chao, “The Importance of Switch Dimension for Energy-Efficient Datacenter Networks,” Elsevier Computer Communications, Special issue on Green Networking, Volume 50, pp. 152-161, September 2014.
8. Y. Xu, Z. Liu, Z. Zhang, H. J. Chao, “High Throughput and Memory Efficient Multi-Match Packet Classification Based on Distributed and Pipelined Hash Tables,” IEEE/ACM Transactions on Networking, vol.22, no.3, June 2014.
9. Y. H. Kao and H. J. Chao, “Design of A Bufferless Photonic Clos Network-on-Chip Architecture,” IEEE Trans on Computers, vol. 65, no. 3, March 2014.
10. S. Shukla, S. Chan, A. S.-W. Tam, A. Gupta, Y. Xu, H. J. Chao, “TCP PLATO: Packet Labelling to Alleviate Time-Out,” IEEE Journal on Selected Areas in Communications, vol.32, no.1, pp.65-76, January 2014.

 

Education

The Ohio State University

Doctor of Philosophy, Electrical Engineering

National Chiao Tung University

Master of Science, Electrical Engineering

National Chiao Tung University

Bachelor of Science, Electrical Engineering

Authored + Edited Books

1. High Performance Switches and Routers, H. J. Chao and B. Liu, published by John Wiley & Sons, Inc, in April 2007.

2. Broadband Packet Switching Technologies – A Practical Guide to ATM Switches and IP Routers, H. J. Chao, C. Lam, and E. Oki, published by John Wiley & Sons, Inc, in Sep. 2001.

3. Quality of Service Control in High-Speed Networks, H. J. Chao and X. Guo, published by John Wiley & Sons, Inc, in Nov. 2001.

 

In Recent School News

Awards + Distinctions

  • Elected to Fellow of National Academy of Inventors (NAI) for “having demonstrated a highly prolific spirit of innovation in creating or facilitating outstanding inventions that have made a tangible impact on quality of life, economic development, and the welfare of society" in 2014. 
  • Elected to be Speaker of the Year by IEEE New Jersey Coast Section, April 2003.
  • Elected to be Fellow of IEEE for contributions to the architecture and application of VLSI circuits in high-speed packet networks in January 2001.
  • Co-recipient of the journal's best paper award of 2001 IEEE Transactions on Circuits and Systems for Video Technology.
  • Received Bellcore Excellence Award in March 1987 for designing the first SONET-like Frame chip running up to 200 Mbit/s using CMOS 2-m technology.

Research Interests

He is currently Director of High-Speed Networking Lab, leading a team of a Research Associate Professor, 6 PhD students, and 10 Master Students. He has been doing research in the areas of software defined networking, network function virtualization, datacenter networks, high-speed packet processing/switching/routing, network security, quality of service control, and network on chip. He holds 58 patents and has published more than 200 journal and conference papers.