Ensuring quality, resilience, and trustworthiness of modern microprocessors is paramount to their ubiquitous deployment in contemporary applications. However, as these devices constitute the most complex integrated circuits, exhaustively analyzing their design and implementation in order to identify weaknesses that may jeopardize their robustness is infeasible. Toward devising realistically applicable solutions, this seminar explores the various trade-offs involved in developing and incorporating cost-effective robustness features. Specifically, a workload-cognizant, cross-layer analysis approach will be presented, in order to:
(1) understand the impact of various malfunctions on robust operation,
(2) develop cost-effective error detection/correction methods for robustness-sensitive structures, such as microprocessor controllers, and
(3) pinpoint weak spots and prioritize resource allocation for enhancing robustness.
The ability to reason across layers, from transistors to architecture and from events to instructions, serves as the key to developing robustness enhancing solutions which extend beyond academic curiosity and become industrially relevant. Accordingly, effectiveness of the proposed methods will be demonstrated not only on academic microprocessor models, but also on commercial microprocessors (e.g., SUN SPARC, Intel Core).
About the Speaker:
Michail Maniatakos is a Ph.D. Candidate in Electrical Engineering at Yale University. He received the B.S. and M.S. degrees in Computer Science and Embedded Systems from the University of Piraeus, Greece, in 2006 and 2007, respectively, as well as the M.S. degree in Electrical Engineering from Yale University in 2008. His research interests include modern microprocessor robustness, hardware security and computer architecture. He is the recipient of the 2011 IEEE TTTC Gerald W. Gordon Award, as well as the winner of the 2011 Embedded Systems Challenge of the NYU-Poly Cyber-Security Awareness Week (CSAW).