Memory Circuits and Systems Design--- A Flourishing Research Frontier

Thursday, March 29, 2012 - 11:00am - 12:00pm EDT

  • Location:Dibner Building, LC400
    New York, US

Speaker: Professor Tong Zhang

Faculty host: Professor Helen Li

Abstract
As the computing industry is entering the multi-/many-core era and world-wide blossoming data centers are enabling a new data-intensive computing paradigm, the well-known memory-wall problem will inevitably become a much more critical issue in future computing systems. Tackling this grand challenge can potentially benefit from two technology trends: (i) Three-dimensional (3D) integration is becoming a technically and economically viable technology that can vertically stack and interconnect several active device planes with massive interconnect bandwidth; (ii) NAND flash memory has become an economically viable technology to penetrate into computing system memory hierarchy, and meanwhile several emerging memory technologies such as phase-change memory and spin-torque transfer memory show great promises to usher significant impact on computing system memory hierarchy. How to most effectively leverage these technology trends still faces a variety of challenges, which provides many exciting opportunities to pursue innovative research. At Rensselaer, we have been actively working in this broad research area, and in this talk I will review our recent and on-going research activities, including (1) development of 3D memory architecture and investigation of 3D processor-memory integration, (2) application of advanced signal processing and coding techniques to improve NAND flash memory system performance, and (3) development of circuit and system design techniques for emerging memory technologies.

About the Speaker
Tong Zhang is an Associate Professor in Electrical, Computer, and Systems Engineering department at Rensselaer Polytechnic Institute. He joined Rensselaer Polytechnic Institute as an assistant professor in 2002 right after he got his doctoral degree from the University of Minnesota. He co-authored over 110 refereed papers in the areas of memory circuits and systems, VLSI signal processing, and computer architecture, with the total citation of over 1100. He has graduated 8 PhD students since 2002. He currently serves as an Associate Editor for the IEEE Transactions on Circuits and Systems - II and the IEEE Transactions on Signal Processing. He is a member of IEEE Signal Processing Society Technical Committee on Design and Implementation of Signal Processing Systems, IEEE Circuits and Systems Society Technical Committee on VLSI Systems and Applications, and IEEE Circuits and Systems Society Technical Committee on Circuits and Systems for Communications. He is a Senior Member of IEEE.