Low-Power/Low-Complexity/High-Speed Iterative Decoder Design

Monday, March 28, 2011 - 11:00am - 12:00pm EDT

  • Location:Dibner Building, LC400
    New York

Speaker: Dr. Saied Hemati

Faculty host: Professor Francisco De Leon

Abstract

Iterative decoders are the best known error-correcting decoders, which provide near optimum decoding performance with a feasible implementation complexity. There are numerous applications for error-correcting decoders, including low-power chip-to-chip communications, sensor networks, home networking, wired and wireless digital communications, agile optical communication systems, and deep space discovery missions. This presentation is concentrating on low-power/low-complexity/high-speed iterative decoders and covers the design and implementation of novel analog/digital circuits, the design or improvement of iterative decoding algorithms, and analyzing the dynamics of analog decoders.

About the Speaker

Saied Hemati received the BSc and the MSc degrees in electronics engineering from the Isfahan University of Technology, Isfahan, Iran, in 1993 and 1997, respectively, and the PhD degree in electrical engineering from Carleton University, Ottawa, ON, Canada, in 2005. From 1997 to 1999, he worked at the Isfahan Optics Center of the Integrated Electronics Industry (IEI), Isfahan, Iran. From 1999 to 2001, he was a researcher at the Research and Education Center of the Isfahan Telecommunication Company, Isfahan, Iran. From 2005 to 2007, he was an NSERC postdoctoral fellow and a part-time professor at the School of Information Technology and Engineering at the University of Ottawa, Ottawa, ON, Canada. He was an assistant professor at the Department of Electrical Engineering at Sharif University of Technology, Tehran, Iran, in 2008. He was a postdoctoral fellow at the Department of Electrical and Computer Engineering at McGill University, Montreal, QC, Canada from 2008 to 2010 and currently, he is a research associate at McGill University. His research interests include the theory of operation and the design and implementation of low-power/low-complexity/high-speed digital and analog iterative error-correcting decoders.

Dr. Hemati is the recipient of several awards and scholarships, including the Senate Medal for outstanding academic achievement at Carleton University, a ReSMiQ (Le Regroupement Stratégique en Microsystèmes du Québec) postdoctoral fellowship, an NSERC (Natural Sciences and Engineering Research Council of Canada) postdoctoral fellowship, a CSA (Canadian Space Agency) NSERC postdoctoral supplement award, a CITO (Communications and Information Technology Ontario) research excellence award, an Ontario Graduate Scholarship, an Ontario Graduate Scholarship in Science and Technology, and the best paper award in the Communications and Information Technology Ontario Knowledge Network Conference in 2002. Dr. Hemati is an IEEE Senior Member and he served as a TPC member for the 2009 and 2011 Canadian Workshops on Information Theory.