Ramesh   Karri

Ramesh Karri

Professor, Electrical and Computer Engineering

Professional Activities

NYU and ECE Department

Some of the departmental committee services include:

Director of NYU Center for Cyber Security (cyber.nyu.edu)

Area director for cyber security, NY state CATT,  

Member of the MS Computer Engineering board, ECE Undergraduate Committee, ECE/CSE Computer Engineering steering committee, Helped develop curricula for dual degree programs at NYU that involved Computer Engineering, Organized the computer engineering showcase as part of NYU open houses Participated in the ABET committee of the ECE department (Computer Engineering)

Co-founded the NYU Center for Cyber Security (cyber.nyu.edu)

Co-founded Embedded Systems Security Challenge, an annual student competition for Hardware Security and Trust (https://csaw.engineering.nyu.edu/esc)

Co-founded TrustHub with three other collaborators. TrustHub is a portal for Hardware Security and Trust (www.trust-hub.org)

Co-founded the NYU Center for Interdisciplinary Studies in Security and Privacy (CRISSP), a pre-cursor to CCS with four faculty: Prof. N. Memon, NYU-Poly (Director), Prof. H. Nissenbaum, NYU- Steinhardt (Associate Director), Prof. R. Zimmerman, NYU-Wagner (Public Policy), Prof. A. Ghose, NYU-Stern (Business) and R. Karri (Secure hardware).  CRISSP  conducts interdisciplinary research in cyber security. CRISSP organized several Workshops on Interdisciplinary Studies in Security and Privacy. CRISSP has been awarded NSF grants for the ASPIRE scholarship for service  (SFS) project.  CRISSP received an NSF IGERT award. 

CRISSP has opened a research center at NYU-AD (CCS-AD). (http://sites.nyuad.nyu.edu/ccs-ad/)

Editorship

Steering committee chair of IEEE Transactions on Multiscale Computing, 2016-

Steering committee member of IEEE Transactions on Multiscale Computing, 2015-

Associate Editor IEEE Transactions on CAD 2014-present (Hardware Security)

Associate Editor IEEE Design and Test 2015-present (Hardware Security)

Associate Editor, IEEE Transactions on Emerging Topics in Computing, 2015-present (Hardware Security)

Associate Editor IEEE Embedded Systems Letters, 2016-present (Hardware Security)

Associate Editor IET Transactions on Cyber-physical Systems 2016-present (Hardware Security)

Associate Editor Springer Journal on Hardware Security 2016-present (Hardware Security)

Associate Editor ACM Transactions on Design Automation of Electronic Systems 2014-present (Hardware Security and CAD)

Editorial Board of IEEE Access, 2015-present

Associate Editor IEEE Transactions on Information Forensics and Security 2010-2014 (Hardware Security)

Associate Editor ACM Journal on Emerging Technologies in Computing 2008-present (Hardware Security and nanoelectronics)

Guest Editorship

(w/ Ozgur Sinanoglu), Special Issue on Emerging Technologies in Hardware Security, ACM Journal on Emerging Technologies in Computing,  2015

(w/ S. Bhunia, F. Koushanfar, K. Mai, Y. Makris, A. Sadeghi, and  O. Sinanoglu, Special Session on Hardware Security, IEEE Transaction on CAD, 2015

(w/ F. Koushanfar), Special Issue on Trustworthy Hardware, Proceedings of the IEEE Transaction on CAD, August 2014 (all papers are tutorial style and open access).

(w/ M. Potkonjak), Special Session on Nanoscale security, IEEE Transaction on Emerging Technologies in Computing, April 2014

Guest Editor (w/ M. Potkonjak), Special Session on Hardware Security and Trust, IEEE Transactions on Information Forensics and Security, Dec 2011

Guest Editor, IEEE Transactions on CAD special issue on High Level Design Validation and Test, March 2001

Guest Editor, IEEE Transactions on Reliability special issue on Fault-Tolerant VLSI Systems, December 2000 

Guest Editor, IEEE Design and Test of Computers special issue on On-Line VLSI Testing, October-December 1998

Conference Committees (recent)

 

2016: 

2015: DAC (Security@DAC Initiative, EXCOM), ETS, VTS, LATW, TRUST, ICCD (General Co-Chair), RFIDSEC (General Co-Chair), WISEC (General Co-Chair)

2014: Security@DAC Track Chair, ICCD, VTS, HOST, VLSI-SoC, DFTVLSI, NANOARCH, ESC.

2013 HOST (General Chair), NANOARCH (General Chair), DFTVLSI (General Chair), DAC.

2012, HOST (Program Chair)

2011: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems,  Program Committee Member IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems Organizer, Special Session on Hardware Security and Trust, IEEE International Conference on Computer Design, Organizer, Annual Embedded Systems Security Challenge,  Vice Program Chair, IEEE Symposium on Hardware Oriented Security and Trust Steering Committee, IEEE Symposium on Nanoscale Architectures

2010: Organizer, The Annual Embedded Systems Security Challenge Vice Program Chair, IEEE Symposium on Hardware Oriented Security and Trust Steering Committee, IEEE Symposium on Nanoscale Architectures IEEE Program Committee Member IEEE Workshop on Fault Detection and Tolerance in Cryptography, IEEE North Atlantic Test Workshop

2009: Publications chair IEEE Workshop on Hardware Oriented Security and Trust, Program Committee Member IEEE Workshop on Hardware Oriented Security and Trust, IEEE Workshop on Fault Detection and Tolerance in Cryptography, IEEE North Atlantic Test Workshop

2008: General co-chair of IEEE/ACM Symposium on Nanoscale Architectures, Publication chair of IEEE Workshop on Hardware Oriented Security and Trust Program Committee Member IEEE Workshop on Hardware Oriented Security and Trust, IEEE Workshop on Fault Detection and Tolerance in Cryptography, IEEE North Atlantic Test Workshop.

2007: General co-chair of IEEE/ACM Symposium on Nanoscale Architectures, Program Committee Member IEEE Workshop on Hardware Oriented Security and Trust, IEEE Workshop on Fault Detection and Tolerance in Cryptography, IEEE North Atlantic Test Workshop

2006: Program Committee Member IEEE Workshop on Fault Detection and Tolerance in Cryptography, IEEE North Atlantic Test Workshop, General co-chair IEEE/ACM workshop on Nanoscale Architectures

2005: Program Committee Member IEEE Design and Test in Europe, IEEE Workshop on Fault Detection and Tolerance in Cryptography, IEEE International Workshop on RT Level Test, Founding Organizer of IEEE/ACM Workshop on Nanoscale Architectures, General chair of IEEE/ACM Workshop on Nanoscale Architectures,

2004: Program Committee Member South American Microelectronics Conference, IEEE International Conference on Computer Design, Design and Test in Europe, IEEE International High-Level Design Validation and Test Workshop, IEEE Workshop on Fault Detection and Tolerance in Cryptography

2003: Program Committee Member IEEE Design and Test in Europe, IEEE International High-Level Design Validation and Test Workshop, Program Vice-Chair IEEE International High-Level Design Validation and Test Symposium, Steering Committee Member IEEE International High-Level Design Validation and Test Symposium

Technical Committees

Chair of the IEEE Technical Committee on Nanoscale Architectures, 2008-2011 Chair of the IEEE Task Force on Nanoscale Architectures, 2006-2007