Hai Li

Hai Li

Assistant Professor

Electrical and Computer Engineering


Hai (Helen) Li received B. S. and M. S. degree in Microelectronics from Tsinghua University, Beijing, China and Ph.D. degree from Electrical and Computer Engineering Department of Purdue University, West Lafayette, IN, USA in 2004. She is currently an Assistant Professor at Department of Electrical and Computer Engineering, Polytechnic Institute of NYU, Brooklyn, NY. Dr. Li was with Qualcomm, Intel and Seagate before.

 Her research interests include architecture/circuit/device co-optimization for green VLSI systems, emerging embedded memory design, 3D integration technology and design, and design for new devices. 

Journal Articles

  1. X. Wang, H. Xi, Y. Chen, H. Li and D. V. Dimitrov, “Spintronic Memristor through Spin Torque Induced Magnetization Motion”, IEEE Electron Device Letters, Vol. 30, No. 3, pp. 294-297, March 2009. (Interviewed by IEEE Spectrum)
  2. X. Wang, Y. Chen, H. Li, H. Liu and D. Dimitrov, “Spin Torque Random Access Memory down to 22nm Technology”, IEEE Transaction on Magnetics, vol. 44, no. 11, Nov. 2008.
  3. H. Li, C.-Y. Cher, T. N. Vijaykumar, and K. Roy, “Combined Circuit and Architectural Level Variable Supply-Voltage Scaling for Low Power”, IEEE Trans. on Very Large Scale Integration (TVLSI) Systems, Vol. 13, No. 5, pp. 564-576, May 2005.
  4. H. Li, S. Bhunia, Y. Chen, T. N. Vijaykumar, and K. Roy, “DCG: Deterministic Clock Gating For Low-Power Microprocessor Design”, IEEE Transactions on Very Large Scale Integration (TVLSI) Systems, vo. 12, no. 3, Mar. 2004, pp. 245-254.
  5. Agarwal, H. Li, and K. Roy, “A Single-Vt Low-Leakage Gated-Ground Cache for Deep Submicron”, IEEE Journal of Solid-State Circuits (JSSC), Vol.38, No.2, pp. 319-328, Feb. 2003.

Other Publications

  1. C.-K. Koh, W.-F. Wong, Y. Chen, and H. Li, “The Salvage Cache: A Fault-tolerant Cache Architecture for Next-generation Memory Technologies,” International Conference on Computer Design, Oct. 2009, pp268-274.
  2. H. Li, H. Xi, Y. Chen, X. Wang, and T. Zhang, “Thermal-Assisted Spin Transfer Torque Memory (STT-RAM) Cell Design Exploration”, IEEE Computer Society Annual Symposium on VLSI (ISVLSI) 2009, pp. 217-222.
  3. H. Li, and Y. Chen, “An Overview of Non-Volatile Memory Technology and the Implication for Tools and Architectures”, Design, Automation & Test in Europe (DATE) 2009, pp. 731-736. (Invited paper)
  4. X. Dong, X. Wu, G. Sun, Y. Chen, H. Li and Y. Xie, “Circuit and Microarchitecture Evaluation of Magnetic RAM (MRAM) as a Universal Memory Replacement”, IEEE Design Automation Conference, Jun. 2008, pp. 554-559.
  5. X. Wang, Y. Chen, H. Li, H. Liu and D. Dimitrov, “Spin Torque Random Access Memory down to 22nm Technology”, IEEE International Magnetics Conference, May 2008, GD-03.
  6. Y. Chen, X. Wang, H. Li, H. Liu and D. Dimitrov, “Design Margin Exploration of Spin-Torque Transfer RAM (SPRAM)”, International Symposium on Quality Electronic Design, Mar. 2008, pp. 684-690. (Best Paper Award, 3 out of 300 submissions, 1%)


Purdue University

Ph. D., Electrical and Computer Engineer

Tsinghua University

M. E., Micro-electronics

Tsinghua University

B. E., Electronic Engineering

Research Interests

Robust embedded memories

Architecture/circuit/device co-optimization for green VLSI systems

Nano-scale emerging devices

3D integration technology