Reconfigurable Concurrent Error Detection Adaptive to the Dynamicity of Power Constraints

Monday, November 1, 2010 - 10:00am - 11:00am EDT

  • Location:Dibner Building, LC400
    Five MetroTech Center, Brooklyn, New York

Speaker: Professor Sobeeh Almukhaizim

Faculty Host: Professor Sinanoglu

Abstract

Concurrent Error Detection (CED) methods are commonly employed to provide some level of error detection capability at the cost of some area and power overhead. Incorporating CED schemes into Integrated Circuits (ICs) is becoming increasingly more important, as the continuous technology scaling leads to an ever-higher transient error-related failure rate. For many applications, the error detection capability must be reconfigured dynamically, in order to adapt to the available power budget, criticality of the processed data, etc. In this work, we propose a reconfigurable duplication-based CED infrastructure for logic circuits. While duplication provides high CED coverage, its power budget requirement (of having two circuits operate all the time) limits its application to designs that can afford the corresponding power dissipation. The key idea of reconfiguration is to enable/disable the operation of the duplicate circuit according to a set of control conditions. When CED is disabled, the inputs to the duplicate circuit retain their previous values (i.e., reduction in power dissipation via elimination of switching activity), yet errors are not detected (i.e., reduction in CED coverage). Experimental results using random or judicious selection of control conditions yield the same end-result; power dissipation is commensurate with CED coverage. Therefore, LFSR structures can be used to easily generate and reconfigure conditions, enabling their dynamic adjustment to adapt to the power constraints of the system during its operation. Moreover, online testing using nonidentical input vectors can also be incorporated, improving the tradeoff between power dissipation and CED coverage.

About the Speaker

Sobeeh Almukhaizim received a B.S. in Electrical and Computer Engineering from Kuwait University in 1999, the M.S. in Computer Science and Engineering from the University of California - San Diego in 2001, and the M.S., M.Phil., and Ph.D. in Electrical Engineering from Yale University in 2003 and 2007. He is currently an Assistant Professor of Computer Engineering and the Assistant Dean of Admissions & Registration at Kuwait University. He was recently awarded the Best Young Researcher Award in Basic and Applied Sciences in Kuwait University in 2009/2010. His research field is the test and reliable design of digital systems.